New Innovations: An Introduction to the IBM z16 processor cache hierarchy from a performance perspective
Project and Program:
MVS,
MVS Performance
Tags:
Proceedings,
SHARE Columbus 2022
The IBM z16 platform introduces an innovative industry leading processor cache
architecture that extends the value of prior generations of hardware within a
new single chip, single cache design. This presentation will cover the
motivations driving the shift from the prior generations tiered inclusive cache
design to private-shared clusters of caches, the underlying performance
implications, and the implications in interpreting CPU MF data.
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